? ? ads-919 14-bit, 2mhz, low-power sampling a/d converters figure 1. ads-919 functional block diagram fea tures 14-bit resolution 2mhz sampling rate no missing codes functionally complete small 24-pin ddip or smt package low power, 1.8 watts operates from 15v or 12v supplies edge-triggered; no pipeline delays unipolar 0 to +10v input range general description the ads-919 is a high-performance, 14-bit, 2mhz sampling a/d converter. this device accurately samples full-scale input signals up to nyquist frequencies with no missing codes. the ads-919 features outstanding dynamic performance including a thd of ?74db. housed in a small 24-pin ddip or smt (gull-wing) package, the functionally complete ads-919 contains a fast-settling sample-hold amplifier, a subranging (two-pass) a/d converter, a precise voltage reference, timing/control logic, and error- correction circuitry. digital input and output levels are ttl. requiring 15v (or 12v) and +5v supplies, the ads-919 typically dissipates 1.8w (1.5w for 12v). the unit is offered with a unipolar input (0 to +10v). models are available for use in either commercial (0 to +70c) or military (?55 to +125c) operating temperature ranges. applications include radar, sonar, spectrum analysis, and graphic/medical imaging. input/output connections pin function pin function 1 bit 14 (lsb) 24 ?12v/?15v suppl y 2 bit 13 23 analog ground 3 bit 12 22 +12v/+15v suppl y 4 bit 11 21 +10v reference out 5 bit 10 20 analog input 6 bit 9 19 analog ground 7 bit 8 18 bit 1 (msb) 8 bit 7 17 bit 2 9 bit 6 16 st ar t conver t 10 bit 5 15 eoc 11 bit 4 14 digit al gr ound 12 bit 3 13 +5v suppl y datel, inc., 11 cabot boulevard, mansfield, ma 02048-115 1 ( u .s .a .) tel: (508) 339-3000 fax: (508) 339-6356 for immediate assistance: (800) 233-2765 ref r e g i s t e r r e g i s t e r 18 bit 1 (msb) 17 bit 2 12 bit 3 11 bit 4 10 bit 5 9 bit 6 8 bit 7 7 bit 8 6 bit 9 5 bit 10 4 bit 11 3 bit 12 2 bit 13 1 bit 14 (lsb) timing and control logic +10v ref. out 21 start convert 16 eoc 15 d i g i t a l c o r r e c t i o n l o g i c dac flash adc buffer ? + s/h analog input 20 13 +5v supply 22 +12v/+15v supply 19, 23 analog ground 14 digital ground 24 ?12v/?15v supply s 2 s 1
? ? ads-919 2 absolute maximum ra tings p arameters limits units +12v/+15v supply (pin 22) 0 to +16 volts ?12v/?15v supply (pin 24) 0 to ?16 volts +5v supply (pin 13) 0 to +6 volts digital input (pin 16) ?0.3 to +v dd +0.3 volts analog input (pin 20) ?4 to +17 volts lead temperature (10 seconds) +300 c physical/envir onment al p arameters min. typ . max. units operating temp. range, case ads-919mc, gc 0 ? +70 c ads-919mm, gm ?55 ? +125 c thermal impedance q j c 6 c/watt q ca 24 c/watt storage temperature ?65 ? +150 c package type 24-pin, metal-sealed, ceramic ddip or smt weight 0.42 ounces (12 grams) +25c 0 to +70c ? 55 to +125c analog input min. typ. max. min. typ. max. min. typ. max. units input voltage range ? 0 to +10 ? ? 0 to +10 ? ? 0 to +10 ? volts input resistance ? 1 ? ? 1 ? ? 1 ? k w input capacitance ? 7 15 ? 7 15 ? 7 15 pf digital input logic levels logic "1" +2.0 ? ? +2.0 ? ? +2.0 ? ? volts logic "0" ? ? +0.8 ? ? +0.8 ? ? +0.8 volts logic loading "1" ? ? +20 ? ? +20 ? ? +20 a logic loading "0" ? ? ?20 ? ? ?20 ? ? ?20 a start convert positive pulse width a 20 200 ? 20 200 ? 20 200 ? ns static performance resolution ? 14 ? ? 14 ? ? 14 ? bits integral nonlinearity (f in = 10khz) ? 0.5 ? ? 0.75 ? ? 1 ? lsb differential nonlinearity (f in = 10khz) ? 0.5 0.95 ? 0.5 0.95 ? 0.5 0.99 lsb full scale absolute accuracy ? 0.1 0.3 ? 0.2 0.4 ? 0.4 0.8 %fsr unipolar offset error (tech note 2) ? 0.1 0.25 ? 0.2 0.4 ? 0.4 1.25 %fsr gain error (tech note 2) ? 0.1 0.3 ? 0.3 0.5 ? 0.5 1 % no missing codes (f in = 10khz) 14 ? ? 14 ? ? 14 ? ? bits dynamic performance peak harmonics (?0.5db) dc to 500khz ? ? 76 ?72 ? ? 76 ?70 ? ?74 ?69 db 500khz to 1mhz ? ? 76 ?70 ? ? 76 ?70 ? ?74 ? 69 db total harmonic distortion (?0.5db) dc to 500khz ? ? 74 ?70 ? ? 74 ?70 ? ?73 ?69 db 500khz to 1mhz ? ?74 ?70 ? ? 74 ?70 ? ?73 ? 68 db signal-to-noise ratio (w/o distortion, ?0.5db) dc to 500khz 74 77 ? 74 77 ? 71 76 ? db 500khz to 1mhz 74 77 ? 74 77 ? 71 75 ? db signal-to-noise ratio ? (& distortion, ?0.5db) dc to 500khz 70 74 ? 70 74 ? 68 73 ? db 500khz to 1mhz 70 74 ? 70 74 ? 68 72 ? db two-tone intermodulation distortion (f in = 200khz, 500khz, f s = 2mhz, ?0.5db) ? ? 80 ? ? ? 80 ? ? ? 79 ? db noise ? 300 ? ? 350 ? ? 450 ? vrms input bandwidth (?3db) small signal (?20db input) ? 9 ? ? 9 ? ? 9 ? mhz large signal (?0.5db input) ? 8 ? ? 8 ? ? 8 ? mhz feedthrough rejection (f in = 1mhz) ? 82 ? ? 82 ? ? 82 ? db slew rate ? 200 ? ? 200 ? ? 200 ? v/s aperture delay time ? 20 ? ? 20 ? ? 20 ? ns aperture uncertainty ? 5 ? ? 5 ? ? 5 ? ps rms s/h acquisition time (to 0.003%fsr, 10v step) 150 190 230 150 190 230 150 190 230 ns overvoltage recovery time ? ? 400 500 ? 400 500 ? 400 500 ns a/d conversion rate 2 ? ? 2 ? ? 2 ? ? mhz functional specifica tions (t a = +25c, v cc = 15v (or 12v), +v dd = +5v, 2mhz sampling rate, and a minimum 1 minute warmup unless otherwise specified.)
? ? ads-919 3 ? this is the time required before the a/d output data is valid after the analog input is back within the specified range. +25c 0 to +70c ?55 to +125c analog output min. typ. max. min. typ. max. min. typ. max. units internal reference voltage +9.95 +10 +10.05 +9.95 +10 +10.05 +9.95 +10 +10.05 volts drift ? 5 ? ? 5 ? ? 5 ? ppm/c external current ? ? 1.5 ? ? 1.5 ? ? 1.5 ma digital outputs logic levels logic "1" +2.4 ? ? +2.4 ? ? +2.4 ? ? volts logic "0" ? ? +0.4 ? ? +0.4 ? ? +0.4 volts logic loading "1" ? ? ?4 ? ? ?4 ? ? ?4 ma logic loading "0" ? ? +4 ? ? +4 ? ? +4 ma delay, falling edge of eoc to output data valid ? ? 35 ? ? 35 ? ? 35 ns output coding straight binary power requirements, 15v power supply ranges +15v supply +14.5 +15 +15.5 +14.5 +15 +15.5 +14.5 +15 +15.5 volts ?15v supply ?14.5 ?15 ?15.5 ?14.5 ?15 ?15.5 ?14.5 ?15 ?15.5 volts +5v supply +4.75 +5 +5.25 +4.75 +5 +5.25 +4.75 +5 +5.25 volts power supply currents +15v supply ? +45 +60 ? +45 +60 ? +45 +60 ma ?15v supply ? ?45 ?60 ? ?45 ?60 ? ?45 ?60 ma +5v supply ? +85 +95 ? +85 +95 ? +85 +95 ma power dissipation ? 1.8 2 ? 1.8 2 ? 1.8 2 watts power supply rejection ? ? 0.02 ? ? 0.02 ? ? 0.02 %fsr/%v power requirements, 12v power supply ranges +12v supply +11.5 +12 +12.5 +11.5 +12 +12.5 +11.5 +12 +12.5 volts ?12v supply ?11.5 ?12 ?12.5 ?11.5 ?12 ?12.5 ?11.5 ?12 ?12.5 volts +5v supply +4.75 +5 +5.25 +4.75 +5 +5.25 +4.75 +5 +5.25 volts power supply currents +12v supply ? +45 +65 ? +45 +65 ? +45 +65 ma ?12v supply ? ?45 ?60 ? ?45 ?60 ? ?45 ?60 ma +5v supply ? +85 +95 ? +85 +95 ? +85 +95 ma power dissipation ? 1.5 1.7 ? 1.5 1.7 ? 1.5 1.7 watts power supply rejection ? ? 0.02 ? ? 0.02 ? ? 0.02 %fsr/%v footnotes: all power supplies must be on before applying a start convert pulse. all supplies and the clock (start convert) must be present during warmup periods. the device must be continuously converting during this time. there is a slight degradation in performance when using 12v supplies. see ordering information for availability of 5v input range. contact datel for availability of other input voltage ranges. a a 2mhz clock with a 200ns wide start convert pulse is used for all production testing. see timing diagram for more details. 6.02 (snr + distortion) ? 1.76 + 20 log full scale amplitude actual input amplitude ? effective bits is equal to: technical notes 1. obtaining fully specified performance from the ads-919 requires careful attention to pc-card layout and power supply decoupling. the device's analog and digital ground systems are connected to each other internally. for optimal performance, tie all ground pins (14, 19 and 23) directly to a large analog ground plane beneath the package. bypass all power supplies and the reference output (pin 21) to ground with 4.7f tantalum capacitors in parallel with 0.1f ceramic capacitors. locate the bypass capaci- tors as close to the unit as possible. if the user-installed offset and gain adjusting circuit shown in figure 2 is used, also locate it as close to the ads-919 as possible. 2. the ads-919 achieves its specified accuracies without the need for external calibration. if required, the device's small initial offset and gain errors can be reduced to zero using the input circuit of figure 2. when using this circuit, or any similar offset and gain-calibration hardware, make adjust- ments following warmup. to avoid interaction, always adjust offset before gain. 3. when operating the ads-919 from 12v supplies, do not drive external circuitry with the reference output. the reference's accuracy and drift specifications may not be met, and loading the circuit may cause accuracy errors within the converter. 4. applying a start convert pulse while a conversion is in progress (eoc = logic "1") initiates a new and inaccurate conversion cycle. data for the interrupted and subsequent conversions will be invalid.
? ? ads-919 4 zero/offset adjust procedure 1. apply a train of pulses to the start convert input (pin 16) so the converter is continuously converting. if using led's on the outputs, a 200khz conversion rate will reduce flicker. 2. apply +305v to the analog input (pin 20). 3. adjust the offset potentiometer until the output bits are all 0's and the lsb flickers between 0 and 1. gain adjust procedure 1. apply +9.999085v to the analog input (pin 20). 2. adjust the gain potentiometer until the output bits are all 1's and the lsb flickers between 1 and 0. input voltage zero adjust gain adjust range +? lsb +fs ?1? lsb 0 to +10v +305v +9.999085v table 1. zero and gain adjust input voltage unipolar digital output (0 to +10v) scale msb lsb +9.999390 +fs ? 1lsb 11 1111 1111 1111 +7.500000 +3/4fs 11 0000 0000 0000 +5.000000 +1/2fs 10 0000 0000 0000 +2.500000 +1/4fs 01 0000 0000 0000 +0.000610 +1lsb 00 0000 0000 0001 0.000000 0 00 0000 0000 0000 table 2. output coding figure 3. typical ads-919 connection diagram calibra tion pr ocedure (refer to figures 2 and 3) any offset and/or gain calibration procedures should not be implemented until devices are fully warmed up. to avoid interaction, offset must be adjusted before gain. the ranges of adjustment for the circuit of figure 2 are guaranteed to compensate for the ads-919's initial accuracy errors and may not be able to compensate for additional system errors. all fixed resistors in figure 2 should be metal-film types, and multiturn potentiometers should have tcr?s of 100ppm/c or less to minimize drift with temperature. a/d converters are calibrated by positioning their digital outputs exactly on the transition point between two adjacent digital output codes. this can be accomplished by connecting led's to the digital outputs and adjusting until certain led's "flicker" equally between on and off. other approaches employ digital comparators or microcontrollers to detect when the outputs change from one code to the next. for the ads-919, offset adjusting is normally accomplished at the point where the output bits are 0's and the lsb just changes from a 0 to a 1. this digital output transition ideally occurs when the applied analog input is +? lsb (+305v). gain adjusting is accomplished when all bits are 1's and the lsb just changes from a 1 to a 0. this transition ideally occurs when the analog input is at +full scale minus 1? lsb's (+9.999085v). figure 2. ads-919 calibration circuit coding is straight binary; 1lsb = 610v. 13 ads-919 14 20 16 18 17 12 11 10 9 8 7 6 5 4 3 2 1 15 bit 1 (msb) bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 bit 8 bit 9 bit 10 bit 11 bit 12 bit 13 bit 14 (lsb) eoc analog input start convert 19, 23 22 24 0.1f 4.7f +5v 0.1f 4.7f 0.1f 4.7f + + ?12v/?15v +12v/+15v + 0.1f + 4.7f 21 +10v ref. out digital ground 0 to +10v analog ground to pin 20 of ads-919 ?15v signal input gain adjust 1.98k w 50 w +15v 2k w 200k w 20k w ?15v +15v zero/ offset adjust
? ? ads-919 5 thermal requirements all datel sampling a/d converters are fully characterized and specified over operating temperature (case) ranges of 0 to +70c and ?55 to +125c. all room-temperature (t a = +25c) production testing is performed without the use of heat sinks or forced-air cooling. thermal impedance figures for each device are listed in their respective specification tables. these devices do not normally require heat sinks, however, standard precautionary design and layout procedures should be used to ensure devices do not overheat. the ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. electrically-insulating, thermally-conductive "pads" may be installed underneath the package. devices should be soldered to boards rather than "socketed", and of course, minimal air flow over the surface can greatly help reduce the package temperature. in more severe ambient conditions, the package/junction temperature of a given device can be reduced dramatically (typically 35%) by using one of datel's hs series heat sinks. see ordering information for the assigned part number. see page 1-183 of the datel data acquisition components catalog for more information on the hs series. request datel application note an-8, "heat sinks for dip data converters", or contact datel directly, for additional information. figure 4. ads-919 timing diagram notes: 1. f s = 2mhz. 2. the ads-919 is an edge-triggered device. all internal operations are triggered by the rising edge of the start convert pulse, which may be as narrow as 20nsec. all production testing is performed at a 2mhz sampling rate with 200nsec wide start pulses. for lower sampling rates, wider start pulses may be used, however, a minimum pulse width low of 20nsec must be maintained. start convert output data n n + 1 data (n ? 1) valid 200ns typ. internal s/h acquisition time 10ns typ. data n valid eoc 30ns typ. conversion time 75ns max. 70ns 10ns 35ns max. 425ns min. invalid data 360ns 20ns hold 190ns 40ns 310ns typ.
?? ads-919 6 figure 5. ads-919 evaluation board schematic 32 30 28 26 24 22 20 33 6 8 10 12 14 16 18 31 27 29 23 25 19 21 3 5 7 9 11 13 15 p2 17 1 2 4 34 5% 200k r3 0.1% 1.98k r4 ? + u6 2 3 4 6 7 op-77 1y1 1y2 1y3 1y4 2y1 2y2 2y3 2y4 1g 2g 2a4 2a3 2a2 2a1 1a4 1a3 1a2 1a1 u3 2 4 6 8 11 13 15 17 19 10 20 18 16 14 12 9 7 5 3 1 74ls240 .1% 2k r5 0.1% 10k r8 p3 p4 74ls86 u4 9 10 8 74ls86 u4 12 13 11 0.1mf c7 0.1mf c5 0.1mf c3 0.1mf c17 0.1mf c16 0.1mf c1 0.1mf c15 15pf c2 0.1mf c10 0.1mf c12 0.1mf c13 2.2mf c6 + 2.2mf c4 + 2.2mf c9 + 2.2mf c8 + 2.2mf c11 + 2.2mf c14 + +5v +5v +5v +5v +15v +15v +15v +15v -15v -15v -15v -15v +5v p1 1 2 5 6 4 3 8 7 10 9 12 11 14 13 16 15 18 17 20 19 22 21 24 23 26 25 20k r2 50 r1 74ls86 u4 4 5 6 74ls86 u4 1 2 3 7 14 b1 b2 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 eoc +5v dgnd st. conv agnd input +10vref +15v agnd -15v u1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 sg1 ? + u5 2 3 4 6 7 ad845 0.1% 10k r7 0.1% 2k r6 -15v 2.2 mf c22 + 0.1mf c23 +15v 2.2mf c19 + 0.1mf c20 y1 1 7 8 14 xtal j3 j5 j4 j2 0.1mf c21 j1 +5v 0.1mf c18 sg2 sg3 2.2mf c24 + 1y1 1y2 1y3 1y4 2y1 2y2 2y3 2y4 1g 2g 2a4 2a3 2a2 2a1 1a4 1a3 1a2 1a1 u2 2 4 6 8 11 13 15 17 19 10 20 18 16 14 12 9 7 5 3 1 74ls240 b13 b11 b12 b10 b9 b6 b5 b4 b3 b14 b1 b2 b8 b7 2. for ads-916 y1 is 500 khz. 1. sg1 should be open. sg2 & for ads-919/929 y1 is 2 mhz. for ads-917 y1 is 1 mhz. sg3 should be closed. notes: see note 1 st.conv. enable msb lsb eoc cog adj gain adj offset convert start input analog ads-916/917/919/929
? ? ads-919 7 figure 6. ads-919 fft analysis figure 7. ads-919 histogram and differential nonlinearity 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 ?90 ?100 ?110 ?120 ?130 ?140 ?150 frequency (mhz) (fs = 2mhz, fin = 975khz, vin = ?0.5db, 16,384-point fft) a m p l i t u d e r e l a t i v e t o f u l l s c a l e ( d b ) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 n u m b e r o f o c c u r r e n c e s digital output code 0 16,384 +0.37 0 ?0.33 16,384 d n l ( l s b ' s ) digital output code
? ? ads-919 mechanical dimensions inches (mm) 0.200 max. (5.080) 0.235 max. (5.969) 0.600 0.010 (15.240) 0.80 max. (20.32) 0.100 typ. (2.540) 0.100 (2.540) 0.018 0.002 (0.457) 0.100 (2.540) 0.040 (1.016) 1.31 max. (33.27) 1 12 13 24 1.100 (27.940) 0.190 max. (4.826) 0.010 (0.254) +0.002 ?0.001 seating plane 0.025 (0.635) dimension tolerances (unless otherwise indicated): 2 place decimal (.xx) 0.010 (0.254) 3 place decimal (.xxx) 0.005 (0.127) lead material: kovar alloy lead finish: 50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating pin 1 index ordering information model operating analog number temp. range input ads-919mc 0 to +70c unipolar (0 to +10v) ads-919mm ?55 to +125c unipolar (0 to +10v) ads-919gc 0 to +70c unipolar (0 to +10v) ads-919gm ?55 to +125c unipolar (0 to +10v) ads-929mc 0 to +70c bipolar (5v)* ads-929mm ?55 to +125c bipolar (5v)* ads-929/883 ?55 to +125c bipolar (5v)* ads-929gc 0 to +70c bipolar (5v)* ads-929gm ?55 to +125c bipolar (5v)* 24-pin ddip versions ads-919mc ads-919mm ads-929mc ads-929mm ads-929/883 24-pin surface mount versions ads-919gc ads-919gm ads-929gc ads-929gm accessories ads-b919/929 evaluation board (without ads-919) hs-24 heat sinks for all ads-919/929 ddip models receptacles for pc board mounting can be ordered through amp inc. part #3-331272-8 (component lead socket), 24 required. for mil-std-883 product specifications, contact datel. * for information, see ads-929 data sheet. 0.80 max. (20.32) 0.015 (0.381) max. radius for any pin 1.31 max. (33.02) 0.100 typ. (2.540) 0.100 (2.540) 0.190 max. (4.826) 0.040 (1.016) 0.020 typ. (0.508) 0.020 (0.508) 24 13 12 1 pin 1 index 0.130 typ. (3.302) dimension tolerances (unless otherwise indicated): 2 place decimal (.xx) 0.010 (0.254) 3 place decimal (.xxx) 0.005 (0.127) lead material: kovar alloy lead finish: 50 microinches (minimum) gold plating over 100 microinches (nominal) nickel plating 0.060 typ. (1.524) 0.010 typ. (0.254) ? ? datel makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. the descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. specifications are subject to change without notice. the datel logo is a registered datel, inc. trademark. iso 9001 iso 9001 registered ds-0319a 11/96 datel, inc. 11 cabot boulevard, mansfield, ma 02048-1151 tel: (508) 339-3000 (800) 233-2765 fax: (508) 339-6356 internet: www.datel.com e-mail:sales@datel.com data sheet fax back: (508) 261-2857 datel (uk) ltd. tadley, england tel: (01256)-880444 datel s.a.r.l. montigny le bretonneux, france tel: 1-34-60-01-01 datel gmbh mnchen, germany tel: 89-544334-0 datel kk tokyo, japan tel: 3-3779-1031, osaka tel: 6-354-2025
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